Electrical and Electronic Engineering Theses

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This collection is made up of doctoral and master theses by research, which have been received in accordance with university regulations.

For more information, please visit the UCD Library Theses Information guide.


Recent Submissions

Now showing 1 - 5 of 38
  • Publication
    RF Amplification and Filtering Techniques for Cellular Receivers
    (University College Dublin. School of Electrical and Electronic Engineering, 2021)
    The usage of various wireless standards, such as Bluetooth, Wi-Fi, GPS, and 4G/5G cellular, has been continually increasing. In order to utilize the frequency bands efficiently and to support new communication standards with lower power consumption, lower occupied volume and at reduced costs, multimode transceivers, software defined radios (SDRs), cognitive radios, etc., have been actively investigated. Broadband behavior of a wireless receiver is typically defined by its front-end low-noise amplifier (LNA), whose design must consider trade-offs between input matching, noise figure (NF), gain, bandwidth, linearity, and voltage headroom in a given process technology. Moreover, monolithic RF wireless receivers have been trending toward high intermediatefrequency (IF) or superhetrodyne radios thanks to recent breakthroughs in silicon integration of band-pass channel-select filters. The main motivation is to avoid the common issues in the currently predominant zero/low-IF receivers, such as poor 2nd-order nonlinearity, sensitivity to 1/f (i.e. flicker) noise and time-variant dc offsets, especially in the fine CMOS technology. To avoid interferers and blockers at the susceptible image frequencies that the high-IF entails, band-pass filters (BPF) with high quality (Q) factor components for sharp transfer-function transition characteristics are now required. In addition, integrated low-pass filters (LPF) with strong rejection of out-of-band frequency components are essential building blocks in a variety of applications, such as telecommunications, video signal processing, anti-aliasing filtering, etc. Attention is drawn toward structures featuring low noise, small area, high in-/out-of-band linearity performance, and low-power consumption. This thesis comprises three main parts. In the first part (Chapters 2 and 3), we focus on the design and implementation of several innovative wideband low-noise (transconductance) amplifiers [LN(T)A] for wireless cellular applications. In the first design, we introduce new approaches to reduce the noise figure of the noise-cancellation LNAs without sacrificing the power consumption budget, which leads to NF of 2 dB without adding extra power consumption. The proposed LNAs also have the capability to be used in current-mode receivers, especially in discrete-time receivers, as in the form of low noise transconductance amplifier (LNTA). In the second design, two different two-fold noise cancellation approaches are proposed, which not only improve the noise performance of the design, but also achieve high linearity (IIP3=+4.25 dBm). The proposed LN(T)As are implemented in TSMC 28-nm LP CMOS technology to prove that they are suitable for applications such as sub-6 GHz 5G receivers. The second objective of this dissertation research is to invent a novel method of band-pass filtering, which leads to achieving very sharp and selective band-pass filtering with high linearity and low input referred (IRN) noise (Chapter 4). This technique improves the noise and linearity performance without adding extra clock phases. Hence, the duty cycle of the clock phases stays constant, despite the sophisticated improvements. Moreover, due to its sharp filtering, it can filter out high blockers of near channels and can increase the receiver’s blocker tolerance. With the same total capacitor size and clock duty cycle as in a 1st-order complex charge-sharing band-pass filter (CS BPF), the proposed design achieves 20 dB better out-of-band filtering compared to the prior-art 1st-order CS BPF and 10 dB better out-of-band filtering compared to the conventional 2nd-order C-CS BPF. Finally, the stop-band rejection of the discrete-time infinite-impulse response (IIR) lowpass filter is improved by applying a novel technique to enhance the anti-aliasing filtering (Chapter 5). The aim is to introduce a 4th-order charge rotating (CR) discrete-time (DT) LPF, which achieves the record of stop-band rejection of 120 dB by using a novel pseudolinear interpolation technique while keeping the sampling frequency and the capacitor values constant.
  • Publication
    Frequency Control of Virtual Power Plants
    (University College Dublin. School of Electrical and Electronic Engineering, 2022) ;
    The Virtual Power Plant (VPP) concept refers to the aggregation of Distributed Energy Resources (DERs) such as solar and wind power plants, Energy Storage Systems (ESSs), flexible loads, and communication networks, all coordinated to operate as a single generating unit. Using as starting point a comprehensive literature review of the VPP concept and its frequency regulation technologies, the thesis proposes a variety of frequency control and state estimation approaches of VPPs, as follows. First, the thesis studies the impact of coordinated frequency control of VPPs on power system transients, in which ESSs are utilized to provide fast frequency regulation. The thesis also proposes a simple yet effective coordinated control of DERs and ESSs able to integrate the total active power output of the DERs, and, thus, to improve the overall power system dynamic performance. The impact of topology on the primary frequency regulation of VPPs is also investigated. With this regard, two types of VPPs topologies are considered, that is, a topology where the DERs that compose the VPP are scattered all-over the transmission grid; and a topology where the DERs are all connected to the same distribution system that is connected to the rest of the transmission grid through a single bus. Next, the thesis proposes a control scheme to improve the dynamic response of power systems through the automatic regulators of converter-based DERs. In this scheme, both active and reactive power control of DERs are varied to regulate both frequency and voltage, as opposed to current practice where frequency and voltage controllers are decoupled. To properly compare the proposed control with conventional schemes, the thesis also defines a metric that captures the combined effect of frequency/voltage response at any given bus of the network. Finally, the thesis presents an on-line estimation method to track the equivalent, time-varying inertia as well as the fast frequency control droop gain provided by VPPs. The proposed method relies on the estimation of the rate of change of the active and reactive power at the point of connection of the VPP with the rest of the grid. It provides, as a byproduct, an estimation of the VPP’s internal equivalent reactance based on the voltage and reactive power variations at the point of connection. Throughout the thesis, the proposed techniques are duly validated through time domain simulations and Monte Carlo simulations, based on real-world network models that include stochastic processes as well as communication delays.
  • Publication
    Low-Complexity Digital Predistortion for 5G Massive MIMO and Handset Transmitters
    (University College Dublin. School of Electrical and Electronic Engineering, 2022)
    The demand for new wireless communication systems to support high mobility and low latency necessitates a rethink of the architecture of wireless communication systems as well as the design of their key components. This thesis presents several novel techniques to solve the major challenges in digital predistortion (DPD) for millimeter wave multi-input multi-output (MIMO) and handset transmitters to lower the hardware cost and computational complexity of the fifth generation (5G) communication systems. The first part of the thesis focuses on the architecture of the MIMO DPD solution for 5G transmitters. To extract DPD model coefficients, a feedback data acquisition path is required. In conventional single-input single-output (SISO) systems, the output is usually acquired directly from the power amplifier (PA) with a coupler. In massive MIMO systems, the number of RF chains is large. Using dedicated feedback paths for each PA separately is not feasible. To lower the hardware cost, a novel data acquisition scheme is proposed to obtain the output signals in far field over the air (OTA) using a single antenna and feedback loop, and then reconstruct the output of each PA. Simulation and experimental results demonstrate that the proposed OTA data acquisition can accurately reconstruct the output of each PA in the MIMO systems and the DPD solutions derived from the reconstructed data can successfully linearize the nonlinear MIMO transmitters. In the multi-user scenario, the nonlinearity of the transmitters varies with the movement of user equipments (UEs), and the DPD model coefficients need to be updated accordingly. To meet the requirement of high mobility, the complexity of the system update must be low. In the second part of the thesis, we present a new DPD system, where DPD model can be updated fast and accurately without capturing PA output or applying costly model extraction algorithms. In the proposed method, nonlinear characteristics of the PA are encoded into low-dimensional PA features using feature extraction algorithms. To identify DPD model coefficients, PA features are extracted first and the DPD model coefficients are then generated directly by DPD generator with PA features. Experimental results show that the proposed DPD solution can linearize PA with very low complexity compared to that using the conventional solutions. Finally, the focus shifts to handset transmitters. Conventionally, DPD is usually deployed for high power base stations. With the continuously increasing bandwidth, DPD may also be required for handset PAs in 5G communication systems. Different from the models used for base stations, DPD model for handset PAs must have very low complexity because of the stringent power budget limit. At the same time, the tolerance for load mismatch must also be considered. The third part of the thesis analyzes the characteristics of handset PAs with load mismatch and introduces a low-complexity DPD model based on magnitude-selective affine (MSA) function. Experimental results demonstrate that the extended MSA (EMSA) model shows better linearization performance while keeping much lower complexity than the conventional DPD models.
  • Publication
    Circularly Polarized Antennas for 5G Millimetre-Wave Communications
    (University College Dublin. School of Electrical and Electronic Engineering, 2022)
    The need of a higher data rate, lower latency, and cost efficiency led to the fifth-generation (5G) emerging as a new communication standard. This generation includes many unused frequencies with high available bandwidth channels that can provide higher capacities such as millimeter-wave (mm-wave) bands. One of the main challenges of working at high frequencies of this generation is path loss that needs to be addressed. To overcome this issue, a high gain antenna with a small size is required. Consequently, the first major question arises: how to effectively increase the gain and efficiency of the antenna at a high frequency with a small size. Importantly, it is vital to transport as much as data is possible without any sensitivity to the alignment of the transmitter or receiver antenna that can be satisfied by using circularly polarized (CP) radiating waves. Thus, the second research question emerges: how to provide high gain small size antenna with CP at high frequencies. To address the first two major research questions in this thesis we designed a miniature dual-band CP antenna that works at 28 GHz and 38 GHz with high gain. This antenna can be implemented in mobile devices, unmanned aerial vehicles (UAVs), and base stations (BSs) because of the small sizes of 11 × 14 × 0.508 mm3. For getting a deep insight into the structure and the design procedures of the dual-band antenna, characteristic mode analysis (CMA) is employed. Note that the CMA is not sensitive to the feeding position and the material in this analysis is not lossy. Therefore, after using CMA, the optimization is conducted in the full-wave simulation as the feeding is added to the structure, and the material is lossy. The single CP antenna covered the bands of 27-28.4 GHz and 34.7-40 GHz, with a maximum gain of 6.3 dBiC and 5.51 dBiC at 28 GHz and 38 GHz, respectively, whereas the radiation efficiency is 94% and 96% with the ARBW of 2.5% and 1.5%. A phased antenna array is then constructed to provide a higher gain for this designed dual-band antenna. In a phased antenna array we consider four designed single element antennas close to each other to create a 2 × 2 antenna array with high gain at 28 GHz and 38 GHz. For a 4 × 4 antenna array, an electromagnetic band-gap (EBG) is used to reduce the mutual coupling between elements in the array. The radiating signals will be sent to different users with circular polarization via electronic beamforming. The position of each antenna element is also optimized to provide the constructive radiating wave towards our desired directions. The array was able to steer the beam between -26.5 to 29.5 degrees for the lower band and -29.5 to 35.5 degrees for the higher band with the maximum gain of 12.8 dBiC and 11.5 dBiC, respectively. Another method to enhance the gain is implementing a lens structure in front of the radiating antenna. Here, a significant challenge is to maintain the CP of the incoming CP wave while the gain is increased. Therefore, the third research question is how to design a lens with the capability of enhancing the gain and keeping the CP when the lens is fed by a CP antenna source. Concerning the third major research question, in this thesis, we designed a CP lens structure. First, a multi-layer lens with a thickness of 2.03 mm was designed, and then a one-layer lens structure with a thickness of just 0.508 mm was made. The lens was located in front of different radiating antennas. These lens structures resulted in significant gain enhancement for various feeding antennas working at 28 GHz. The unit cell of the one-layer lens can provide a broad phase shift compared to the multi-layer counterpart. The proposed lens structures not only increased the gain of the incoming CP wave but also kept its polarization to overcome the issues of reflectivity, absorption, inclement weather, and mis
  • Publication
    Contributions to the theory and development of low-jitter bang-bang integrated frequency synthesizers
    (University College Dublin. School of Electrical and Electronic Engineering, 2022)
    The advent of next-generation wireless standards demands ever-increasing data-rate communication systems. It mainly involves a higher carrier frequency to take advantage of wider bandwidth channels and more complex modulation schemes to pack more information into each symbol. In this context, the bottleneck is represented by the frequency synthesizer used to generate the local oscillator signal for the transceiver, which has to operate under stringent low output jitter requirements. Such performance must be provided at low power dissipation and area consumption in order to meet the requirements of low-cost and high integration level of the modern communication systems. The digital phase locked loop architecture can meet the required jitter performance while synthesizing fractional-N frequencies. Such PLLs offer significant advantages over their traditional analog counterpart in terms of area occupation, flexibility and scalability in advanced deep sub-µm CMOS technologies. The digital PLL topology based on a bang-bang phase detector, denoted bang-bang PLL, which is a single bit digital phase detector, leads to a less complex and more power-efficient architecture, but, on the other hand, it also introduces a hard nonlinearity in the loop, making the analysis of the bang-bang topology more challenging than in the multi-bit case. A comprehensive phase noise analysis of bang-bang digital PLLs is presented which overcomes the limitations of previous models and it is valid in all cases where physical noise sources (i.e. reference and DCO) are dominant with respect to quantization errors. In particular, (i) input-referred jitter is estimated by means of a linear time-domain analysis derived from a nonlinear DPLL model, and (ii) phase noise spectra are predicted using a discrete-time domain model that accounts for time-variant effects that arise from the intrinsic multirate nature of the DPLL. The possibility of accurately determining the DPLL jitter and phase noise spectra, enabled by the novel analysis presented in this thesis, is key to significantly speeding up the design-space exploration phase, since it allows one to perform quick and precise parametric sweeps. However, even when designed properly, bang-bang PLLs are affected by the unavoidable bang-bang phase detector quantization noise, which is added on top of the intrinsic reference and DCO phase noise. The quantization noise can be appreciated in the PLL's output spectrum as increased in band noise with respect to the analog counterpart, that, in fact, still achieves superior performance in terms of jitter-power. This results in worse integrated jitter performance for the same intrinsic levels of reference and oscillator phase noise. To overcome the binary phase detector quantization noise in DPLLs, state-of-the-art works rely on a multi-bit time-to-digital converter to digitize the PLL phase error with a physical resolution below the input jitter, leading to increased design complexity, with an associated area and power penalty. In order to overcome the ultimate limit of the bang-bang PLL, a digital PLL based on a bang-bang phase detector with adaptively optimized noise shaping has been fabricated in a 28nm CMOS process. The prototype occupies a core area of 0.21 mm2 and draws 10.8 mW power from a 0.9 V supply. The integrated jitter is 69.52 fs and 80.72 fs for the integer-N and the fractional-N case, respectively. Achieving a jitter-power figure-of-merit of -251.5 dB in fractional-N mode, the proposed system effectively bridges the gap to analog implementations. The first chapter of this work is introductory, and is intended to give some background information needed to underpin the remaining part of the thesis. The following chapters, 2, 3 and 4, collect the results achieved during the PhD activity, and each of them is associated with a publication. In the last chapter, conclusions are drawn and the open points are discussed in order to be considered for future work.