Now showing 1 - 8 of 8
  • Publication
    Pulsed Digital Oscillators for Electrostatic MEMS
    This paper introduces a new actuation scheme for implementing Pulsed Digital Oscillators (PDOs) for electrostatic MEMS resonators. In this scheme, the capacitance of the device is biased with a voltage and it is periodically sampled. Short pulses of zero voltage are applied depending on the decisions taken by the oscillator loop. The paper discusses in detail the implementation of such electrostatic PDO (e-PDO) through a prototype and links the e-PDO to the conventional PDO theory. As an example, it is shown that with this actuation scheme it is possible to excite different resonances of the mechanical structure simply by changing the parameters of the feedback filter of the oscillator.
    Scopus© Citations 11  561
  • Publication
    Control of MEMS vibration modes with Pulsed Digital Oscillators : Part I — theory
    The aim of this paper is to show that it is possible to excite selectively different mechanical resonant modes of a MEMS structure using Pulsed Digital Oscillators (PDOs). This can be done by simply changing the working parameters of the oscillator, namely its sampling frequency or its feedback filter. A set of iterative maps is formulated to describe the evolution of the spatial modes between two sampling events in PDOs. With this lumped model, it is established that under some circumstances PDO bitstreams related to only one of the resonances can be obtained, and that in the antioscillation regions of the PDO the mechanical energy is absorbed into the electrical domain on average. The possibility of selecting for a given resonant frequency the oscillation and antioscillation behaviour allows one to obtain oscillations at any given resonant mode of the MEMS structure.
    Scopus© Citations 15  364
  • Publication
    Excitation of multiple spatial modes of a MEMS cantilever in the pulsed digital oscillator
    The aim of this paper is to apply an approach that will allow us to consider different mechanical modes of a MEMS cantilever in the form of separate mass-spring-damper equations with the appropriate form of an external driving. In the paper, we focus on a specific MEMS cantilever and use a Pulsed Digital Oscillator (PDO) to keep self-sustained oscillations of the mechanical structure. By applying the order-reduction procedure to a partial differential equation that describes the transversal deflections, we obtain a system of coupled ordinary differential equations that describes the excitation of multiple spatial modes. On the basis of these ordinary differential equations, we formulate a set of iterative maps to describe the evolution of the modes between two sampling events. The numerical simulations we present are focused on the most common case when the first two mechanical modes are taken into consideration
      342
  • Publication
    Generation of a Clocking Signal in Synchronized All-Digital PLL Networks
    In this brief, we propose a discrete-time framework for the modeling and studying of all-digital phase-locked loop (ADPLL) networks with applications in clock-generating systems. The framework is based on a set of nonlinear stochastic iterating maps and allows us to study a distributed ADPLL network of arbitrary topology. We determine the optimal set of control parameters for the reliable synchronous clocking regime, taking into account the intrinsic noise from both local and reference oscillators. The simulation results demonstrate very good agreement with experimental measurements of a 65-nm CMOS ADPLL network. This brief shows that an ADPLL network can be synchronized both in frequency and phase. We show that for a large Cartesian network the average network jitter increases insignificantly with the size of the system.
      423Scopus© Citations 10
  • Publication
    Limit on Converted Power in Resonant Electrostatic Vibration Energy Harvesters
    Based on the formal analysis of a resonant electrostatic vibration energy harvester operating in constant-charge mode with a gap-closing transducer, we show that the system displays universal behaviour patterns. In this paper, we treat the harvester as a nonlinear forced oscillator and bound the area of control parameters where the system displays regular harmonic oscillations allowing the conditioning circuit to operate in the most effective mode. Before the system exhibits irregular behaviour, there exists a universal optimal value of normalised converted power regardless of the system design and control parameters.
    Scopus© Citations 17  504
  • Publication
    Synchronized Interconnected ADPLLs for Distributed Clock Generation in 65 nm CMOS Technology
    This brief presents an active distributed clock generator for manycore systems-on-chip consisting of a 10×10 network of coupled all-digital phase-locked loops, achieving less than 38 ps phase error between neighboring oscillators over a frequency range of 700–840 MHz at VDD=1.1 V. The network is highly robust against VDD variations. An energy cost of 2.7 μW /MHz per node is 7 times lower than that in analog implementations of similar architectures and is twice lower than that in conventional H-tree architectures. This is the largest on-chip all-digital phase-locked loop network ever implemented. With clock generation nodes linked only locally, this solution is proven to be scalable. The presented clock generation network does not require any external reference, except for the start-up frequency selection, generating a synchronized signal in fully autonomous mode and maintaining frequency stability within 0.09% during 1700 seconds. Such a network of frequency and phase synchronized oscillators can be used as a source for local clocking areas.
      413Scopus© Citations 4
  • Publication
    Semianalytical model for high speed analysis of all-digital PLL clock-generating networks
    In this paper, we propose the model of a network consisting of All-Digital Phase-Locked Loop Network in application to Clock-Generating Systems. The method is based on a solution of a system of non-linear finite-difference stochastic equations and allows us to perform high speed simulations of a distributed Clock Network on arbitrary topology. The result of our analysis show a good agreement with experimental measurements of a 65nm CMOS All-Digital Phase-Locked Loop Network.
      420Scopus© Citations 3
  • Publication
    Bifurcation Scenarios in Electrostatic Vibration Energy Harvesters
    In this paper, we present numerical bifurcation analysis of an electrostatic vibration energy harvester operating in constant-charge mode and using the in-plane gap closing transducer. We show how the system can be represented as a nonlinear oscillator and analysed using methods of nonlinear dynamics. We verify previous analytical theories and explain the behaviour of these energy harvesters, particularly in the regime between the first period doubling bifurcation and chaos.
      304