Linearized discrete-time model of higher order charge-pump PLLs

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Author(s)
Uri
Date Issued
29 August 2011
Date Available
01T11:44:50Z May 2012
Abstract
In this paper, we derive linearized discrete-time models of higher order Charge-Pump Phase-Locked Loops (CPPLLs). The behaviour of CP-PLLs in the steady state is analysed and an important feature is developed. The nonlinear state equations of CP-PLLs are linearized around the equilibrium point. The linearized discrete-time model is finally verified using behavioral simulations in Matlab and PSpice.
Sponsorship
Science Foundation Ireland
Type of Material
Conference Publication
Publisher
IEEE
Copyright (Published Version)
2011 IEEE
Keywords
Subject – LCSH
Phase-locked loops
On-chip charge pumps
DOI
Web versions
Language
English
Status of Item
Peer reviewed
Part of
2011 20th European Conference on Circuit Theory and Design (ECCTD) [proceedings]
Description
European Conference on Circuit Theory and Design (ECCTD), Linkoping, Sweden, 29-31 August, 2011
ISBN
978-1-4577-0617-2
This item is made available under a Creative Commons License
Owning collection
Electrical and Electronic Engineering Research Collection