A TDD/FDD SAW-less superheterodyne receiver with blocker-resilient band-pass filter and multi-stage HR in 28nm CMOS

Author(s)
Uri
Date Issued
2015-06-19
Date Available
2015-12-14T13:27:23Z
Abstract
A SAW-less discrete-time superheterodyne receiver (RX) with multi-stage harmonic rejection in 28nm CMOS, featuring highly linear LNTA, employs a novel blocker-resilient octal charge-sharing band-pass filter to achieve low power consumption. The RX features NF of 2.1 to 2.6dB, and IIP3 of 8 to 14 dBm, while drawing only 24 to 37 mW in different operation modes.
Other Sponsorship
M4S/Hisilicon, Leuven, Belgium
Type of Material
Conference Publication
Publisher
IEEE
Copyright (Published Version)
2015 IEEE
Subjects

Superheterodyne recei...

Power consumption

DOI
Language
English
Status of Item
Peer reviewed
Journal
Proceedings of IEEE Symposium on VLSI Circuits (VLSI), Kyoto, Japan 2015
Conference Details
IEEE 2015 Symposium on VLSI Circuits (VLSI), Kyoto, Japan, 17 -19 June 2015
This item is made available under a Creative Commons License
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2015-01-26_vlsi_madadi_dtrx.pdf

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Owning collection
Electrical and Electronic Engineering Research Collection