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  5. Charge-Domain Signal Processing of Direct RF Sampling Mixer with Discrete-Time Filters in Bluetooth and GSM Receivers
 
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Charge-Domain Signal Processing of Direct RF Sampling Mixer with Discrete-Time Filters in Bluetooth and GSM Receivers

Author(s)
Ho, Yo-Chuol  
Staszewski, Robert Bogdan  
Muhammad, Khurram  
et al.  
Uri
http://hdl.handle.net/10197/8633
Date Issued
2006-12
Date Available
2017-06-29T14:04:43Z
Abstract
RF circuits for multi-GHz frequencies have recently migrated to low-cost digital deep-submicron CMOS processes. Unfortunately, this process environment, which is optimized only for digital logic and SRAM memory, is extremely unfriendly for conventional analog and RF designs. We present fundamental techniques recently developed that transform the RF and analog circuit design complexity to digitally intensive domain for a wireless RF transceiver, so that it enjoys benefits of digital and switched-capacitor approaches. Direct RF sampling techniques allow great flexibility in reconfigurable radio design. Digital signal processing concepts are used to help relieve analog design complexity, allowing one to reduce cost and power consumption in a reconfigurable design environment. The ideas presented have been used in Texas Instruments to develop two generations of commercial digital RF processors: a single-chip Bluetooth radio and a single-chip GSM radio. We further present details of the RF receiver front end for a GSM radio realized in a 90-nm digital CMOS technology. The circuit consisting of low-noise amplifier, transconductance amplifier, and switching mixer offers dB dynamic range with digitally configurable voltage gain of 40 dB down to dB. A series of decimation and discrete-time filtering follows the mixer and performs a highly linear second-order lowpass filtering to reject close-in interferers. The front-end gains can be configured with an automatic gain control to select an optimal setting to form a trade-off between noise figure and linearity and to compensate the process and temperature variations. Even under the digital switching activity, noise figure at the 40 dB maximum gain is 1.8 dB and dBm IIP2 at the 34 dB gain. The variation of the input matching versus multiple gains is less than 1 dB. The circuit in total occupies 3.1 . The LNA, TA, and mixer consume less than mA at a supply voltage of 1.4 V.
Type of Material
Journal Article
Publisher
Springer
Journal
EURASIP: Journal on Wireless Communications and Networking
Volume
2006
Start Page
1
End Page
14
Copyright (Published Version)
2006 the Authors
Subjects

Direct RF sampling

Signal processing

DOI
10.1155/WCN/2006/62905
Web versions
https://link.springer.com/article/10.1155/WCN/2006/62905
Language
English
Status of Item
Peer reviewed
This item is made available under a Creative Commons License
https://creativecommons.org/licenses/by-nc-nd/3.0/ie/
File(s)
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2006_eurasip_ho_rx.pdf

Size

2.44 MB

Format

Adobe PDF

Checksum (MD5)

8042c9017c83459c8b5a77ae4952d6cc

Owning collection
Electrical and Electronic Engineering Research Collection

Item descriptive metadata is released under a CC-0 (public domain) license: https://creativecommons.org/public-domain/cc0/.
All other content is subject to copyright.

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