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SYSCORE: A Coarse Grained Reconfigurable Array Architecture for Low Energy Biosignal Processing
Date Issued
2011-05-03
Date Available
2015-09-16T09:09:08Z
Abstract
The promise of 24/7 patient monitoring and online diagnosis using wearable and implantable biomedical devices has engendered significant research interest in the development of low power biosignal processing platforms. Herein, a novel Coarse Grained Reconfigurable Array (CGRA) architecture is presented for low power, real time processing of biomedical signals. The proposed architecture differs from previously proposed CGRAs in that it is designed for low power, rather than for high performance. The proposed architecture was implemented in a software modeler and simulator and in Verilog. The architecture was shown to provide savings in energy consumption of up to 99% and speed up of up to 64 times compared to a conventional DSP processor for typical biosignal processing functions.
Sponsorship
Science Foundation Ireland
Type of Material
Conference Publication
Publisher
IEEE
Copyright (Published Version)
2011 IEEE
Language
English
Status of Item
Peer reviewed
Conference Details
19th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), Salt Lake City, Utah, USA, 1 - 3 May, 2011
This item is made available under a Creative Commons License
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SYSCORE_A_Coarse_Grained_Reconfigurable_Array_Architecture_for_Low_Energy_Biosignal_Processing.pdf
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