Blind SAR ADC Capacitor Mismatch Calibration
|Title:||Blind SAR ADC Capacitor Mismatch Calibration||Authors:||Salib, Armia; Flanagan, Mark F.; Cardiff, Barry||Permanent link:||http://hdl.handle.net/10197/11130||Date:||9-Aug-2017||Online since:||2019-10-08T15:17:25Z||Abstract:||This paper presents an all-digital background blind calibration technique for the capacitor mismatch problem in SAR ADCs. It utilizes the redundancy offered using a sub-radix-2 DAC architecture to blindly estimate the mismatch and the assigned weight for each comparator decision. The weights are estimated by building partial histogram windows for the comparator decision vectors. To remove the dependency on the input signal's probability density function, the histogram windows are normalized with respect to their peaks. Matlab simulation results show that an ENOB within 0.12bit of the optimal is attained using the proposed algorithm.||Funding Details:||European Commission - European Regional Development Fund
Science Foundation Ireland
|Type of material:||Conference Publication||Publisher:||IEEE||Copyright (published version):||2017 IEEE||Keywords:||SAR ADC; Capacitor mismatch; Calibration||DOI:||10.1109/MWSCAS.2017.8052991||Language:||en||Status of Item:||Peer reviewed||Is part of:||2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)||Conference Details:||The 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)||ISBN:||9781509063895|
|Appears in Collections:||Electrical and Electronic Engineering Research Collection|
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