This paper introduces and compares the implementation of a number of FPGA based ADPLL network prototyping architectures. Networks are then created using three different ADPLL implementations and tests performed on each. Based on these test results, comparison is made to both the expected performance and role of each ADPLL design as a development tool.
2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
Conference Details
The 2019 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lausanne, Switzerland, 15-18 July 2019
ISBN
978-1-7281-1201-5/19
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