Linearized discrete-time model of higher order charge-pump PLLs
|Title:||Linearized discrete-time model of higher order charge-pump PLLs||Authors:||Bi, Chuang
Curran, Paul F.
|Permanent link:||http://hdl.handle.net/10197/3595||Date:||29-Aug-2011||Abstract:||In this paper, we derive linearized discrete-time models of higher order Charge-Pump Phase-Locked Loops (CPPLLs). The behaviour of CP-PLLs in the steady state is analysed and an important feature is developed. The nonlinear state equations of CP-PLLs are linearized around the equilibrium point. The linearized discrete-time model is finally verified using behavioral simulations in Matlab and PSpice.||Funding Details:||Science Foundation Ireland||Type of material:||Conference Publication||Publisher:||IEEE||Copyright (published version):||2011 IEEE||Keywords:||Phase-locked loops;Charge-pump||Subject LCSH:||Phase-locked loops
On-chip charge pumps
|DOI:||10.1109/ECCTD.2011.6043385||Language:||en||Status of Item:||Peer reviewed||Is part of:||2011 20th European Conference on Circuit Theory and Design (ECCTD) [proceedings]||Conference Details:||European Conference on Circuit Theory and Design (ECCTD), Linkoping, Sweden, 29-31 August, 2011|
|Appears in Collections:||Electrical and Electronic Engineering Research Collection|
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