Limit Cycle Behavior in a Class-AB Second-Order Square Root Domain Filter

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Title: Limit Cycle Behavior in a Class-AB Second-Order Square Root Domain Filter
Authors: De La Cruz Blas, Carlos A.
Feely, Orla
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Date: Aug-2011
Abstract: This paper shows how an unwanted limit cycle can be exhibited by a second-order CMOS companding filter. The filter employs the quasi-quadratic law of the MOS transistor in strong inversion and saturation to achieve compression together with a Class-AB topology to extend the dynamic range. In the zero-input case, the filter operates in the manner expected of an externally-linear circuit. However, when a standard linear IC design technique is applied to it, unwanted zero-input sustained oscillations may be observed. Simulations from PSpice and measurement results from a semi-custom realization in a 0.8μm CMOS process are used to explore this behavior. This work highlights an aspect of the behavior of such filters that must be taken into account by analog designers.
Funding Details: Science Foundation Ireland
Type of material: Journal Article
Publisher: Springer
Journal: Analog Integrated Circuits and Signal Processing
Volume: 68
Issue: 2
Start page: 171
End page: 181
Copyright (published version): 2011 Springer
Keywords: Square root domainLog domainFilters
Subject LCSH: Log domain filters
Limit cycles
DOI: 10.1007/s10470-011-9599-4
Language: en
Status of Item: Peer reviewed
Appears in Collections:Electrical and Electronic Engineering Research Collection

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