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Dynamic Current Modelling at the Instruction Level
Date Issued
2006-10-06
Date Available
2015-09-17T15:34:37Z
Abstract
Estimation of processor current consumption is important for the design of low power systems. This paper proposes a novel method for estimating the dynamic current consumption of a processor. The method models dynamic current as the output of a linear system excited by a signal comprised of the total current due to each instruction. System identification is performed by cross-correlation of a pseudo-random stimulus with the measured current. The method was applied to the Texas Instruments TMS320VC5510 DSP and was found to provide an average correlation of 93% between estimated and measured dynamic current across a range of benchmarks.
Type of Material
Conference Publication
Publisher
IEEE
Copyright (Published Version)
2006 ACM
Language
English
Status of Item
Peer reviewed
Conference Details
International Symposium on Low Power Electronics and Design (ISLPED), Tegernsee, Germany, 4 - 6 October, 2006
This item is made available under a Creative Commons License
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