Dynamic Current Modelling at the Instruction Level
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|Title:||Dynamic Current Modelling at the Instruction Level||Authors:||Rizo-Morente, J.
Bleakley, Chris J.
|Permanent link:||http://hdl.handle.net/10197/7060||Date:||6-Oct-2006||Abstract:||Estimation of processor current consumption is important for the design of low power systems. This paper proposes a novel method for estimating the dynamic current consumption of a processor. The method models dynamic current as the output of a linear system excited by a signal comprised of the total current due to each instruction. System identification is performed by cross-correlation of a pseudo-random stimulus with the measured current. The method was applied to the Texas Instruments TMS320VC5510 DSP and was found to provide an average correlation of 93% between estimated and measured dynamic current across a range of benchmarks.||Type of material:||Conference Publication||Publisher:||IEEE||Copyright (published version):||2006 ACM||Keywords:||Measurements;Experimentation;Design;Verification||DOI:||10.1109/LPE.2006.4271814||Language:||en||Status of Item:||Peer reviewed||Conference Details:||International Symposium on Low Power Electronics and Design (ISLPED), Tegernsee, Germany, 4 - 6 October, 2006|
|Appears in Collections:||Computer Science Research Collection|
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