Improved Doherty Amplifier Design with Minimum Phase Delay in Output Matching Network for Wideband Application
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|Title:||Improved Doherty Amplifier Design with Minimum Phase Delay in Output Matching Network for Wideband Application||Authors:||Xia, Jing
|Permanent link:||http://hdl.handle.net/10197/8400||Date:||20-Oct-2016||Abstract:||This letter presents an improved Doherty power amplifier (DPA) for high-efficiency and wideband operations. To achieve the impedance transformations both in the low power region and at saturation, a design approach is proposed to determine the desired minimum phase delays of the carrier and peaking output matching networks, which can simplify the load modulation network of the DPA and extend the bandwidth. For verification, a 1.6-2.2 GHz asymmetric DPA was designed and measured. The designed DPA can deliver an efficiency of 51%-55% at 10 dB back-off power over the whole band. For a 20 MHz LTE signal, an average efficiency of higher than 50% can be achieved at 36 dBm average output power with the linearity of -48 dBc after linearization across the band.||Funding Details:||Science Foundation Ireland||Type of material:||Journal Article||Publisher:||IEEE||Copyright (published version):||2016 IEEE||Keywords:||Back-off; Doherty; High efficiency; Output matching network; Power amplifiers; Wideband||DOI:||10.1109/LMWC.2016.2615004||Language:||en||Status of Item:||Peer reviewed|
|Appears in Collections:||Electrical and Electronic Engineering Research Collection|
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