Built-in measurements in low-cost digital-RF transceivers
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Title: | Built-in measurements in low-cost digital-RF transceivers | Authors: | Eliezer, Oren; Staszewski, Robert Bogdan | Permanent link: | http://hdl.handle.net/10197/8636 | Date: | 1-Jun-2011 | Online since: | 2017-07-10T14:58:29Z | Abstract: | Digital RF solutions have been shown to be advantageous in various design aspects, such as accurate modeling, design reuse, and scaling when migrating to the next CMOS process node. Consequently, the majority of new low-cost and feature cell phones are now based on this approach. However, another equally important aspect of this approach to wireless transceiver SoC design, which is instrumental in allowing fast and low-cost productization, is in creating the inherent capability to assess performance and allow for low-cost built-in calibration and compensation, as well as characterization and final-testing. These internal capabilities can often rely solely on the SoCs existing processing resources, representing a zero cost adder, requiring only the development of the appropriate algorithms. This paper presents various examples of built-in measurements that have been demonstrated in wireless transceivers offered by Texas Instruments in recent years, based on the digital-RF processor (DRPTM) technology, and highlights the importance of the various types presented; built-in self-calibration and compensation, built-in self-characterization, and built-in self-testing (BiST). The accompanying statistical approach to the design and productization of such products is also discussed, and fundamental terms related with these, such as 'soft specifications', are defined. | Type of material: | Journal Article | Publisher: | Institute of Electronics, Information and Communication Engineers | Journal: | IEICE Transactions on Electronics | Volume: | E94-C | Issue: | 6 | Start page: | 930 | End page: | 937 | Copyright (published version): | 2011 The Institute of Electronics, Information and Communication Engineers | Keywords: | System-on-chip (SoC); Digital RF processor (DRP); Design for testability (DfT); Design for manufacturability (DfM); Built-in self-testing (BiST); Soft specifications | DOI: | 10.1587/transele.E94.C.930 | Language: | en | Status of Item: | Peer reviewed | This item is made available under a Creative Commons License: | https://creativecommons.org/licenses/by-nc-nd/3.0/ie/ |
Appears in Collections: | Electrical and Electronic Engineering Research Collection |
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