Low-Cost FPGA Implementation of Volterra Series-Based Digital Predistorter for RF Power Amplifiers
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|Title:||Low-Cost FPGA Implementation of Volterra Series-Based Digital Predistorter for RF Power Amplifiers||Authors:||Guan, Lei
|Permanent link:||http://hdl.handle.net/10197/8645||Date:||Apr-2010||Abstract:||This paper presents a low-complexity and low-cost hardware implementation of a Volterra series-based digital predistorter (DPD). This is achieved by introducing two novel model complexity reduction techniques into the system, namely, lookup table assisted gain indexing and time-division multiplexing for multiplier sharing. Experimental results show that this novel DPD implementation uses much less hardware resources, but still maintains excellent performance compared to conventional approaches.||Type of material:||Journal Article||Publisher:||IEEE||Copyright (published version):||2010 IEEE||Keywords:||Volterra series; Linearisation techniques; Lookup table (LUT); Power amplifier; Predistortion||DOI:||10.1109/TMTT.2010.2041588||Language:||en||Status of Item:||Peer reviewed|
|Appears in Collections:||Electrical and Electronic Engineering Research Collection|
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