A Concept of Synchronous ADPLL Networks in Application to Small-Scale Antenna Arrays
|Title:||A Concept of Synchronous ADPLL Networks in Application to Small-Scale Antenna Arrays||Authors:||Koskin, Eugene
|Permanent link:||http://hdl.handle.net/10197/9684||Date:||9-Feb-2018||Online since:||2019-03-26T10:17:55Z||Abstract:||In this paper, we introduce a reconfigurable oscillatory network that generates a synchronous and distributed clocking signal. We propose an accurate model of the network to facilitate the study of its design space and ensure that it operates in its optimal, synchronous mode. The network is designed and implemented in a fully integrated 65-nm CMOS system-on-chip that utilizes coupled all digital phase locked loops interconnected as a Cartesian grid. The model and measurements demonstrate frequency and phase synchronization even in the presence of noise and random initial conditions. This network is proposed for small-scale multiple input multiple-output systems that require complete synchronization both in frequency and in phase.||Type of material:||Journal Article||Publisher:||IEEE||Journal:||IEEE Access||Volume:||6||Start page:||18723||End page:||18730||Copyright (published version):||2018 IEEE||Keywords:||Antenna arrays; Distributed clocks; Networks of oscillators; Synchronous circuits; Internet of Things; Systems-on-a-chip||DOI:||10.1109/ACCESS.2018.2804324||Language:||en||Status of Item:||Peer reviewed|
|Appears in Collections:||Electrical and Electronic Engineering Research Collection|
Show full item record
This item is available under the Attribution-NonCommercial-NoDerivs 3.0 Ireland. No item may be reproduced for commercial purposes. For other possible restrictions on use please refer to the publisher's URL where this is made available, or to notes contained in the item itself. Other terms may apply.