A Concept of Synchronous ADPLL Networks in Application to Small-Scale Antenna Arrays

DC FieldValueLanguage
dc.contributor.authorKoskin, Eugene-
dc.contributor.authorGalayko, Dimitri-
dc.contributor.authorBlokhina, Elena-
dc.date.accessioned2019-03-26T10:17:55Z-
dc.date.available2019-03-26T10:17:55Z-
dc.date.copyright2018 IEEEen_US
dc.date.issued2018-02-09-
dc.identifier.citationIEEE Accessen_US
dc.identifier.issn2169-3536-
dc.identifier.urihttp://hdl.handle.net/10197/9684-
dc.description.abstractIn this paper, we introduce a reconfigurable oscillatory network that generates a synchronous and distributed clocking signal. We propose an accurate model of the network to facilitate the study of its design space and ensure that it operates in its optimal, synchronous mode. The network is designed and implemented in a fully integrated 65-nm CMOS system-on-chip that utilizes coupled all digital phase locked loops interconnected as a Cartesian grid. The model and measurements demonstrate frequency and phase synchronization even in the presence of noise and random initial conditions. This network is proposed for small-scale multiple input multiple-output systems that require complete synchronization both in frequency and in phase.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.rights© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en_US
dc.subjectAntenna arraysen_US
dc.subjectDistributed clocksen_US
dc.subjectNetworks of oscillatorsen_US
dc.subjectSynchronous circuitsen_US
dc.subjectInternet of Thingsen_US
dc.subjectSystems-on-a-chipen_US
dc.titleA Concept of Synchronous ADPLL Networks in Application to Small-Scale Antenna Arraysen_US
dc.typeJournal Articleen_US
dc.internal.authorcontactothereugene.koskin@ucd.ieen_US
dc.statusPeer revieweden_US
dc.identifier.volume6en_US
dc.identifier.startpage18723en_US
dc.identifier.endpage18730en_US
dc.identifier.doi10.1109/ACCESS.2018.2804324-
dc.neeo.contributorKoskin|Eugene|aut|-
dc.neeo.contributorGalayko|Dimitri|aut|-
dc.neeo.contributorBlokhina|Elena|aut|-
dc.date.updated2019-03-22T14:32:31Z-
item.fulltextWith Fulltext-
item.grantfulltextopen-
Appears in Collections:Electrical and Electronic Engineering Research Collection
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