On Computational Models for Flash Memory Devices

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Title: On Computational Models for Flash Memory Devices
Authors: Ajwani, Deepak
Beckmann, Andreas
Jacob, Riko
et al.
Permanent link: http://hdl.handle.net/10197/9903
Date: 20-Aug-2009
Online since: 2019-04-11T08:31:49Z
Abstract: Flash memory-based solid-state disks are fast becoming the dominant form of end-user storage devices, partly even replacing the traditional hard-disks. Existing two-level memory hierarchy models fail to realize the full potential of flash-based storage devices. We propose two new computation models, the general flash model and the unit-cost model, for memory hierarchies involving these devices. Our models are simple enough for meaningful algorithm design and analysis. In particular, we show that a broad range of existing external-memory algorithms and data structures based on the merging paradigm can be adapted efficiently into the unit-cost model. Our experiments show that the theoretical analysis of algorithms on our models corresponds to the empirical behavior of algorithms when using solid-state disks as external memory.
Type of material: Conference Publication
Publisher: Springer
Series/Report no.: Lecture Notes in Computer Science (LCNS, volume 5526)
Copyright (published version): 2009 Springer
Keywords: Block sizePriority queueExternal memoryInternal memorySparse graph
DOI: 10.1007/978-3-642-02011-7_4
Language: en
Status of Item: Peer reviewed
Is part of: Vahrenhold, J. (ed.). Experimental Algorithms: 8th International Symposium, SEA 2009, Dortmund, Germany, June 4-6 2009. Proceedings
ISBN: 978-3-642-02010-0
Appears in Collections:Computer Science Research Collection

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