Now showing 1 - 2 of 2
  • Publication
    Analysis and Design of Highly Efficient Wideband RF-Input Sequential Load Modulated Balanced Power Amplifier
    The analysis and design of an RF-input sequential load modulated balanced power amplifier (SLMBA) are presented in this article. Unlike the existing LMBAs, in this new configuration, an over-driven class-B amplifier is used as the carrier amplifier while the balanced PA pair is biased in class-C mode to serve as the peaking amplifier. It is illustrated that the sequential operation greatly extends the high-efficiency power range and enables the proposed SLMBA to achieve high back-off efficiency across a wide bandwidth. An RF-input SLMBA at 3.05-3.55-GHz band using commercial GaN transistors is designed and implemented to validate the proposed architecture. The fabricated SLMBA attains a measured 9.5-10.3-dB gain and 42.3-43.7-dBm saturated power. Drain efficiency of 50.9-64.9/ 46.8-60.7/43.2-51.4% is achieved at 6-/8-/10-dB output power back-off within the designed bandwidth. By changing the bias condition of the carrier device, higher than 49.1% drain efficiency can be obtained within the 12.8-dB output power range at 3.3 GHz. When driven by a 40-MHz orthogonal frequency-division multiplexing (OFDM) signal with 8-dB peak-to-average power ratio (PAPR), the proposed SLMBA achieves adjacent channel leakage ratio (ACLR) better than -25 dBc with an average efficiency of 63.2% without digital predistortion (DPD). When excited by a ten-carrier 200-MHz OFDM signal with 10-dB PAPR, the average efficiency can reach 48.2% and -43.9-dBc ACLR can be obtained after DPD.
      503Scopus© Citations 27
  • Publication
    Extend High Efficiency Range of Doherty Power Amplifier by Modifying Characteristic Impedance of Transmission Lines in Load Modulation Network
    A load modulation network with characteristic impedance-modified transmission lines (TLs) is presented in this paper to extend the efficiency range and bandwidth of the Doherty power amplifier (DPA). Characteristic impedance values for designing the proposed DPA with different high efficiency ranges are given and wideband performance can also be achieved. A DPA with 2.55-3.35 GHz bandwidth using commercial GaN transistors is designed and implemented to validate the proposed architecture. The fabricated DPA achieves a measured 9.2-10.4 dB gain and 44.3-45.4 dBm saturated power. 57.9-75.6% and 47.6-58.8 % drain efficiency is achieved at saturation and 8 dB output power back-off (OBO) within the designed bandwidth, respectively. When driven by a 5-carrier 100 MHz OFDM signal with 8 dB peak to average power ratio (PAPR), the proposed DPA achieves adjacent channel leakage ratio (ACLR) of better than -50 dBc after digital pre-distortion with average efficiency of 53.4%, 55.3% and 56.6% at 2.75, 2.95 and 3.15 GHz centre frequencies.
      185Scopus© Citations 9