Now showing 1 - 2 of 2
  • Publication
    Oscillator-based ADCs: An exploration of time-mode analog-to-digital conversion
    This paper introduces two novel ideas within the field of time-mode oscillator-based analog-to-digital conversion. In the form of a self-injection-locked ring-oscillator (SILRO), a method is presented to inherently linearise the voltage-to-frequency (V-F) characteristic, while an alternative proposal of an ultra-low-power (ULP), ultra-low-voltage (ULV) VCO-based analog-to-digital converter (ADC) operating in weak-inversion at a supply of 0.2 V is suitable for high power efficiency, direct energy harvesting applications. The ideas are distinctly separate in concept and physical implementation, but through the common platform of Verilog-A behavioural modelling, a unified methodology applicable to both architectures is proposed for system level exploration and performance evaluation.
      730Scopus© Citations 1
  • Publication
    Frequency-domain adaptive-resolution level-crossing-sampling ADC
    In the framework of the large-scale wireless sensor networks involved in the Internet-of-Things (IoT), analog-to-digital converters (ADCs) must target ever increasing levels of power efficiency and amenability to ultra-scaled CMOS technologies. Digitally intensive architectures and smart conversion algorithms are therefore the fuel of future ultra-low power (ULP) designs. The minimization of the output average bitrate is an effective way to maximize the system energy efficiency. Level-crossing-sampling (LC) ADCs are a class of converters that addresses such problem. In their conventional implementation, however, they are mainly impaired by analog blocks (i.e. the high-performance comparators), difficult to be designed in deep nanoscale CMOS. This paper describes a highly-digital frequency-domain implementation of a LC ADC, which replaces the analog comparators with an oscillator-based quantizer and simple digital logic. LC is performed in the digital frequency-domain, where the application of adaptive-resolution algorithms to further enhance power efficiency becomes straightforward. Behavioral modeling simulations demonstrate the appropriateness of the proposed topology by comparing it with the conventional designs and by evaluating the impact of the oscillator-based-quantizer nonidealities on the ADC performance.
      474Scopus© Citations 2