Now showing 1 - 6 of 6
  • Publication
    A Modified Decomposed Vector Rotation-Based Behavioral Model With Efficient Hardware Implementation for Digital Predistortion of RF Power Amplifiers
    (IEEE, 2017-01-23) ;
    This paper proposes a novel hardware implementation strategy to achieve low-cost design for digital predistortion (DPD) of radio frequency (RF) power amplifiers (PAs) using a modified decomposed vector rotation (DVR)-based behavioral model. To make the model hardware friendly, we first modify the model into a sub-decomposed format which significantly reduces the computational complexity in model extraction. We then reassemble the coefficients and propose a simple digital implementation structure for real-time signal processing in the transmit path. A new Dual-Direction COordinate Rotation DIgital Computer (DD-CORDIC) design is also proposed to simultaneously calculate both magnitude and ejθn values to facilitate the model implementation. To validate hardware implementation, a wide-band signal is employed to evaluate the performance with a Doherty power amplifier. Experimental results show that the proposed approach can achieve comparable performance with much lower system complexity compared to that using the conventional approaches.
      451Scopus© Citations 20
  • Publication
    Digital Compensation for Transmitter Leakage in Non-Contiguous Carrier Aggregation Applications With FPGA Implementation
    In this paper, a generalized dual-basis envelope-dependent sideband (GDES) distortion model structure is proposed to compensate the distortion induced by transmitter leakage in concurrent multi-band transceivers with non-contiguous carrier aggregation. This model has a generalized structure that is constructed via first generating a nonlinear basis function that maps the inputs to the target frequency band where the distortion is to be cancelled, and then multiplying with a second basis function that generates envelope-dependent nonlinearities. By combining these two bases, the model keeps in a relatively compact form that can be flexibly implemented in digital circuits such as field programmable gate array (FPGA). Experimental results demonstrated that excellent suppression performance can be achieved with very low implementation complexity by employing the proposed model.
      500Scopus© Citations 15
  • Publication
    Digital Suppression of Transmitter Leakage in FDD RF Transceivers: Aliasing Elimination and Model Selection
    (IEEE, 2017-12-07) ; ;
    The transmitter (TX)-induced interference due to power amplifier nonlinearities poses severe desensitization problems to the receiver chain in frequency-division duplexing transceivers. Due to nonlinear signal process involved, a high sampling rate is normally required in the existing digital suppression approaches, which can result in high cost and high power consumption in wideband systems. In this paper, a new digital suppression model is proposed to cancel the TX leakage at baseband with a low sampling rate. The cancellation model is based on the modified decomposed vector rotation model. With the addition of cross-Term products, the enhanced model is capable of eliminating the aliasing effect arising from the reduced sampling rate. Theoretical analysis of aliasing elimination is presented, and the algorithm is subsequently verified by both simulation and experiment results, confirming the effectiveness and feasibility of the proposed cancellation technique for TX leakage suppression. Compared with conventional solutions, the new approach uses much less hardware resource and consumes much lower power while achieving comparable performance.
      353Scopus© Citations 7
  • Publication
    Preparing Linearity and Efficiency for 5G: Digital Predistortion for Dual-Band Doherty Power Amplifiers with Mixed-Mode Carrier Aggregation
    As new wireless communication standards seek to meet the myriad demands of today's end users, the traditional RF transmitter chain is faced with an evolving set of challenges. To maximize information throughput, signal bandwidths are continuously growing. In fourth-generation longterm evolution-advanced (also called LTE-A), for example, to meet the stated goals of 1-Gb/s downlink and 500-Mb/s uplink speeds, the carrier aggregation (CA) technique was introduced, expanding the maximum transmit bandwidth up to 100 MHz [1]. With mobile traffic expected to increase by a factor of 1,000 over the next decade, future fifth-generation (5G) systems will continue to place new demands on the transmit chain.
      876Scopus© Citations 43
  • Publication
    Digital Suppression of Transmitter Leakage in FDD RF Transceivers With an Enhanced Low-Sampling Rate Behavioral Model
    With continuously increasing of signal bandwidth, the transmitter leakage issue in frequency division duplexer (FDD) transceivers becomes severer. In this letter, an enhanced behavioral model is proposed to suppress FDD transmitter leakage at a low-sampling rate. The theoretical analysis is provided to explain the operation principle of the proposed model. The experimental results show that the proposed model can effectively increase the accuracy of generating sideband replica and thus improve the suppression performance.
      301Scopus© Citations 4
  • Publication
    Magnitude-Selective Affine Function Based Digital Predistorter for RF Power Amplifiers in 5G Small-Cell Transmitters
    (IEEE, 2017-06-09) ; ;
    To accommodate small-cell deployment in future 5G wireless communications, a magnitude-selective affine function based digital predistortion model for RF power amplifiers is proposed. This model has a very simple model structure and is easy to implement. Experimental results showed, by employing this model, substantial hardware resource reduction can be achieved without sacrificing performance in comparison with the existing models.
      427Scopus© Citations 13