Wu, YingYingWuStaszewski, Robert BogdanRobert BogdanStaszewski2018-02-132018-02-132016 IEEE2016-06-15http://hdl.handle.net/10197/92222016 Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP) Krakow, Poland, June, 2016We propose a 50-MS/s two-step flash-ΔΣ time-todigital converter (TDC) using stable time amplifiers (TAs).The TDC demonstrates low-levels of shaped quantization noise. The system is simulated in 40-nm CMOS and consumes 1.3 mA from a 1.1 V supply. The bandwidth is broadened to Nyquist rate. At frequencies below 25 MHz, the integrated TDC error is as low as 143 fsrms, which is equal to an equivalent TDC resolution of 0.5 ps.en© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksNoise shapingTime domain registerError feedbackTime-interleavedTime amplifierTwo-stepTDCMASHConference Publication10.1109/EBCCSP.2016.76052822017-07-10https://creativecommons.org/licenses/by-nc-nd/3.0/ie/