Ortega, AlvaroAlvaroOrtegaMusa, AysarAysarMusaMonti, AntonelloAntonelloMontiMilano, FedericoFedericoMilano2019-04-182019-04-182018 IEEE2018-12-24http://hdl.handle.net/10197/10023RCAR 2018 - IEEE International Conference on Real-time Computing and Robotics, Kandima, Maldives 1-5 AugustThis paper validates a theoretical approach, namely, the frequency divider formula, recently proposed by the first and fourth authors to estimate local frequency variations based on the synchronous machine rotor speeds and on signals from phasor measurement units (PMUs). The validation is based on simulations performed in a Real-Time Digital Simulator with physical PMUs connected in the loop. The case study considers the well-known WSCC 3-machine, 9-bus test system. Simulation results show the high accuracy of the frequency divider formula to estimate the frequency at every bus of the network. Results also show that the frequency divider prevents the numerical issues due to fast variations of the voltage when measured by the PMU and indicate that such a formula can be utilized to test the fidelity of PMU implementations.en© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksFrequency estimationPhasor measurement unitsRotorsFrequency conversionFrequency synchronizationPhase locked loopsHardware-in-the-Loop Validation of the Frequency Divider FormulaConference Publication2018-06-26727481-RE-SERVESFI/15/IA/3074727481PCIG14-GA-2013-630811https://creativecommons.org/licenses/by-nc-nd/3.0/ie/