Madadi, ImanImanMadadiTohidian, MassoudMassoudTohidianCornelissens, KoenKoenCornelissensVandenameele, PatrickPatrickVandenameeleStaszewski, Robert BogdanRobert BogdanStaszewski2015-12-142015-12-142015 IEEE2015-06-19http://hdl.handle.net/10197/7301IEEE 2015 Symposium on VLSI Circuits (VLSI), Kyoto, Japan, 17 -19 June 2015A SAW-less discrete-time superheterodyne receiver (RX) with multi-stage harmonic rejection in 28nm CMOS, featuring highly linear LNTA, employs a novel blocker-resilient octal charge-sharing band-pass filter to achieve low power consumption. The RX features NF of 2.1 to 2.6dB, and IIP3 of 8 to 14 dBm, while drawing only 24 to 37 mW in different operation modes.en© 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Superheterodyne receiversPower consumptionConference Publication10.1109/VLSIC.2015.72313022015-12-02https://creativecommons.org/licenses/by-nc-nd/3.0/ie/