Nguyen, VietVietNguyenSchembari, FilippoFilippoSchembariStaszewski, Robert BogdanRobert BogdanStaszewski2019-08-262019-08-262017 IEEE2017-08-319781538609156http://hdl.handle.net/10197/11029EBCCSP 2017: 3rd International Conference on Event-Based Control, Communication and Signal Processing, Funchal, Madeira, Portugal, 24-26 May 2017This paper introduces two novel ideas within the field of time-mode oscillator-based analog-to-digital conversion. In the form of a self-injection-locked ring-oscillator (SILRO), a method is presented to inherently linearise the voltage-to-frequency (V-F) characteristic, while an alternative proposal of an ultra-low-power (ULP), ultra-low-voltage (ULV) VCO-based analog-to-digital converter (ADC) operating in weak-inversion at a supply of 0.2 V is suitable for high power efficiency, direct energy harvesting applications. The ideas are distinctly separate in concept and physical implementation, but through the common platform of Verilog-A behavioural modelling, a unified methodology applicable to both architectures is proposed for system level exploration and performance evaluation.en© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Analog-to-digital converter (ADC)Voltage-controlled oscillator (VCO)Time-domain ADCUltra-low voltageUltra-low powerInternet-of-ThingsVerilog-A modellingConference Publication1610.1109/EBCCSP.2017.80228297475852019-08-1814/RP/I292https://creativecommons.org/licenses/by-nc-nd/3.0/ie/