McGrath, KevinKevinMcGrathZhu, AndingAndingZhu2019-05-072019-05-072017 IEEE2017-04-219781509058624http://hdl.handle.net/10197/10309The 2017 Integrated Nonlinear Microwave and Millimetre-wave Circuits Workshop (INMMiC), Graz, Austria, 20-21 April 2017This paper presents the design of a frequency selectable oscillator used as part of a new data acquisition architecture for digital predistortion (DPD) of RF power amplifiers (PAs). The proposed architecture aims to alleviate the requirement of high sampling rate analog-to-digital-converters (ADCs) in the data acquisition loop. The oscillator utilizes switchable capacitors with a digital control scheme and is capable of operating between 2.0 GHz and 2.5 GHz with an approximate frequency step size of 512 kHz.en© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Digital predistortionFrequency selectable oscillatorModel extractionPower amplifierSwitchable capacitorsConference Publication10.1109/inmmic.2017.79272942019-01-2713/RC/2077https://creativecommons.org/licenses/by-nc-nd/3.0/ie/