Analysis, Prediction and Mitigation of Nonlinearity-induced Spurs and Noise in Fractional-N Frequency Synthesizers

Fractional-N frequency synthesizers are commonly used in communication systems. A divider controller is employed within a conventional divider-based fractional-N frequency synthesizer to achieve the desired fractional division ratio. A MultistAge Noise SHaping (MASH) Digital Delta-Sigma Modulator (DDSM) is usually used as the divider controller because of its high-pass shaped quantization error and ease of implementation. Among contributors to the output phase noise of a conventional fractional-N frequency synthesizer, the noise of the divider controller is normally high-pass shaped and its in-band contribution can be ignored under the assumption of linearity. In the presence of nonlinearity, however, the phase noise contribution of the divider controller becomes prominent in-band, denoted folded noise, and spurious tones usually appear. The causes of divider controller-induced spurious tones in the long-term spectrum have been the focus of research for many years and efforts continue to be made to identify and mitigate nonlinearity-induced spurs in synthesizers. In this thesis, we analyze the generation of nonlinearity-induced folded noise in fractional-N frequency synthesizers with MASH-based divider controllers and an accurate prediction method is described. The phenomena of spur immunity and sub-fractional spurious tones, called "horn spurs", are analyzed in MASH modulators. A family of DDSMs is introduced that allows one to achieve enhanced performance in terms of nonlinearity-induced noise. The so-called ENOP DDSMs are provably spur free in the presence of static polynomial nonlinearities of a specified order. Moreover, another family of DDSMs is introduced whose quantization error is inherently immune from spurs when interacting with a static nonlinearity. The so-called INIS-DDSMs are suitable for digital to analog transduction, such as for DCO controllers.